CS8224 - Active Ethernet Aggregation Switch SoC The Cortina Systems® CS8224 Active Ethernet Aggregation Switch System-on-a-Chip (CS8224 Switch SoC) enables carriers to offer higher bandwidth services over their existing copper access network without having to go through expensive fiber upgrades. The CS8224 Switch SoC is a carrier class Active Ethernet aggregation switching device designed to perform all the packet processing, forwarding, and subscriber management functions required for carrier Ethernet aggregation switches.

The CS8224 Switch SoC carrier Ethernet aggregation solution consists of a performance oriented system-on-a-chip and a fully tested, customizable software tool kit. The CS8224 Switch SoC provides valuable cost savings and reduces the research and design cycle for OEM customers, and supports two Gigabit Ethernet connection to the backplane or WAN interface and simultaneous line rate, and QoS-aware aggregation and switching of the UNI Ethernet ports. The datapath supports flexible packet classification, carrier class, per subscriber/service queuing and traffic management, using external packet memory to implement sophisticated service level agreements that effectively supports triple-play services.

The CS8224 Switch SoC is architected and designed as a Carrier Ethernet aggregation solution with more focus on subscriber management and flow-based queuing, shaping/scheduling, and QoS enforcement. The CS8224 Switch SoC performs all the standard L2 and VLAN-based forwarding without losing control over the individual subscriber service level agreements. The CS8224 Switch SoC is architected with the access network cost, power, and form factor constraints in mind. The device comes with a software package that seamlessly works with customers’ existing system software without significant additional software development.
Applications
  • EFM Aggregation Switch 
  • Active Ethernet Aggregation Switch
Features and Benefits
  • Deterministic performance and line rate throughput at all packet sizes
  • Single chip integrating flexible packet classifier, flow based traffic manager, and carrier-class aggregation switch
  • Control and management plane processor that runs the software needed for the line card or system
  • Flexible packet classifier that extracts and manipulates all the fields of, up to layer-4 headers to indentify flows, perform ACL, VLAN manipulation and packet editing
  • IPv4 and IPv6 support and IP-aware bridging
  • Deterministic and fully configurable traffic management algorithms including multi-level buffer management and hierarchical bandwidth management
  • Aggregation switching compliant with IEEE 802.1D, 802.1Q, and 802.1AD standards
  • Supports large number of subscribers with up to 8 QoS class flow per subscribers Two multi-rate, Gigabit Ethernet SNI interfaces with LAG
  • Integrated high performance SerDes that runs up to 3.125 Gbps
  • Four multi-rate Ethernet interface blocks, each independently configurable to be GE or 8 x FE MAC ports
  • Additional VoIP and IPTV interfaces
  • 32-bit DDR2 SDRAM and Flash memory Interface
  • Generic local bus interface
Technical Documents