LXT385 - 8 port E1 S/H PCM Transceiver Note - Not recommended for new designs

 

Applications
  • SDH tributary interfaces
  • Digital cross connects
  • Public/private switching trunk line interfaces
  • Microwave transmission systems ■ M13, E1-E3 MUX
    • Features and Benefits
  • Transceiver with Jitter Attenuation for use in 2.048 Mbps (E1) applications
  • 8 fully-independent receiver/transmitters
  • Support for E1 standards: —Exceeds ETSI ETS 300 166
  • Meets ETS 300 233Low-power single-rail 3.3-V CMOS power supply, with 5-V tolerant I/Os
  • Jitter attenuation —Crystal-less —Digital clock recovery PLL —Referenced to 2.048-MHz clock. Normal operation requires only MCLK. Does not require a reference clock frequency higher than the line frequency. —Can be switched between receive and transmit path —Meets ETSI CTR12/13, ITU G.736, G.742, and G.823 —Optimized for Synchronous Digital Hierarchy (SDH) applications, meetsITU G.783 mapping jitter standard —Constant throughput delay
  • Differential receiver architecture —High margin for noise interference —Operates at >12 dB of cable attenuation ■ Hitless Protection Switching —Eliminates mechanical relays for redundancy 1+1 protection applications —Increases quality of service
  • Transmitters —Transmit waveform shaping meets ITU G.703 specifications —Exceeds ETSI ETS 300 166 transmit return-loss specifications —Low-impedance transmit drivers, independent of transmit pattern and supply-voltage variations —Low-current transmit output option that can reduce power dissipation by up to 15%. By changing the LXT385 transceiver output transformer ratio from 1:2 to 1:1.7, the savings occur whether TVCC is at 5 V or 3.3 V. 90 mW per channel (typical). See Table 62 “LXT385 Transceiver Power Consumption” on page 104 and Table 64 “Load3 Power Consumption” on page 105.
  • HDB3 AMI line encoder/decoder
  • LOS per ITU G.775 and ETS 300 233
  • Diagnostics: —Can be configured for G.722-compliant, non-intrusive performance (protected) monitoring points —Industry-standard P1149.1 JTAG Boundary Scan test port
  • 8-bit parallel processor interface or 4 wire serial control interface
  • Hardware and Software control modes
  • Operating temperature -40 °C to 85 °C
  • 160-ball BGA or 144-pin LQFP packages
    • Product Change Notifications
    PCN106766 - 02 Ethernet Phy, MAC, Framers, T1/E1, Legacy Phy and Framers - Product Marking and Packaging Change, Product Marking 2006-Oct-12
    PCN0107-02.1 Ethernet Phy, MAC, Framers, T1/E1, Legacy Phy and Framers - Product Marking Change 2007-Jan-24
    PCN0707-04.0 LXT360, LXT380, LXT384, LXT386 & LXT971; Manufacturing Site 2007-Jul-23
    DCL200711-01 Early Shipments due to IT Shutdown and Conversion 2007-Nov-06
    DCL0108-01.0 Product Code Change 2008-Jan-04
    DCL200802-01.0 Cortina Systems, Inc. Products (Ethernet Phy, MAC, Framers, T1/E1, Transport and Legacy Phy, & EPON), DCL200802-01.0; FYI – Europe & Middle Eastern Region Orders and Payment Transition 2008-Feb-05
    PCN0308-04.0 Cortina Systems, Pack Change, Select QFP's 2008-Mar-25
    PCN0308-01.0 Cortina Systems, Product Marking Change, FYI 2008-Mar-13
    DCL200804-01 Cortina Systems, Inc. Products (Ethernet Phy, MAC, Framers, T1/E1, Transport and Legacy Phy, & EPON), ; FYI – Latin America Regions Order and Payment Transition, DCL200804-01 2008-Apr-14